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| − | [[File:cw506_white_medsize.jpg|600px]]
| + | == Page Moved == |
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| − | == Background ==
| + | See [https://rtfm.newae.com/Tools/CW506%20Advanced%20Breakout%20Board/ NewAE RTFM Page]. The previous content on this wiki has been moved to the above link. See wiki history if you would like to view exact older versions of this page. |
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| − | The CW506 is a simple but powerful breakout board for devices using NewAE Technology's [[20-Pin Connector]] standard. Almost all of our target boards and capture hardware feature this connector, making the breakout board widely applicable to our product line.
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| − | The breakout board features a variety of voltage translators, test points, connectors, and switches that makes it simple to interface various test equipment and target devices together. This includes both connecting other lab equipment, along with connecting ChipWhisperer capture hardware to your own targets.
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| − | [[File:cw506_annotate1.png]]
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| − | == Connection Routing ==
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| − | The following shows the routing of various connections on the breakout board:
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| − | [[File:cw506_route.png]]
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| − | === Voltage Translation ===
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| − | The voltage translation is done with three different parts:
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| − | * SN74LVC1T45DBVT for high-speed clock lines (unidirectional, approx 200 Mbps max speed, 1.65V - 5.5V)
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| − | * PI4ULS5V201TAEX for GPIO1/2 (bidirectional, approx 20 Mbps max speed, 1.2V - 5.5V)
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| − | * GTL2003PW for GPIO2/3 + Others (bidirectional, 1.0V - 5.5V)
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| − | Note the clock translators limit lower operating voltage, if not using HS1 or HS2 you can safely use this board down to 1.2V. The maximum speed of the voltage translators varies with different output voltages, see datasheet for details.
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| − | The VCCIO net on the board defines what logic level the target (i.e., the signals on the jumpers and headers on the right side of the board) section operates at. There is a vertical double-line on the breakout board, everything on the right side of the double-line operates at VCC-IO levels.
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| − | === SW4 (Target Disconnect) ===
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| − | A DIP switch can be used to disconnect certain pins of the 20-pin header. The DIP switch has small text marked "ON", when the DIP switch is moved to this position the 20-pin connector is ENABLED.
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| − | The following shows an example where we've disconnected GPIO4 (the trigger) from our target device, and am feeding an external trigger in with the header (JP4) to the left of the DIP switch. This new trigger signal will be routed to the attached ChipWhisperer, and can be used instead of the trigger coming from the target device. Notice the DIP switch for TIO4 (GPIO4/IO4) is set to the LEFT, and the rest are set to the RIGHT (ON).
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| − | [[File:Cw506_dip_nogpio4.jpg|none|Setting the DIP switch to the LEFT causes the 20-pin target to be disconnected.|thumb|400x400px]]The following summarizes the connection for different SW4 settings. Note the 20-pin connector and the test-points to the right of that connector (marked TIO1, TIO2, TIO3, TIO4) are the only things disconnected.
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| − | {| class="wikitable"
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| − | !
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| − | !scope="row" colspan="2"|3.3V Logic
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| − | !scope="row" colspan="5"|VCC-IO Logic
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| − | |-
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| − | !SW4 Setting
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| − | !JP1 (Left 20-Pin)
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| − | !JP3
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| − | !JP4
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| − | !JP5/JP6
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| − | !JP2 (Right 20-Pin)
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| − | !TIO1-TIO4 Test Points
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| − | !TP7/TP8, SMA Connectors
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| − | |-
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| − | |OFF
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| − | |TIO1-TIO4
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| − | |☑
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| − | |☑
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| − | |-
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| − | |ON
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| − | |TIO1-TIO4
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| − | |☑
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| − | |☑
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| − | |☑
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| − | |☑
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| − | |- style="background-color: white;"
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| − | |OFF
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| − | |HS1-HS2
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| − | |☑
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| − | |☑
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| − | |- style="background-color: white;"
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| − | |ON
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| − | |HS1-HS2
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| − | |☑
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| − | |☑
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| − | |☑
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| − | |-
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| − | |?
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| − | |SPI/PDI/Other
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| − | |☑
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| − | |☑
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| − | |☑
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| − | |}
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| − | === VCC-IO Settings ===
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| − | The VCC-IO level defines what voltage the inputs/outputs on the RIGHT side operate at (the target side). The inputs/outputs on the LEFT side (the ChipWhisperer capture side) are always 3.3V.
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| − | The VCC-IO level can be set to one of:
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| − | * Fixed 3.3V.
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| − | * Based on voltage on VREF pin of JP2 (20-pin target connector).
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| − | * Based on external voltage reference.
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| − | Normally you would use either "JP2.VREF" or "+3V3". All NewAE target boards will provide a signal on JP2.VREF which indicates the correct translation voltage. If using a simple breakout or your own target board, you may just wish to force use of 3.3V IO voltages however.
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| − | These settings are configured with switch SW1 and SW2. In addition, three LEDs will confirm your setting. For example here the board is set to output 3.3V reference signals:
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| − | [[File:cw506_vccio.jpg|400px]]
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| − | The current VCC-IO voltage is available on test point TP11 (just beside the 3 LEDs).
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| − | === JP2.+3v3 Settings ===
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| − | == Use Cases ==
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| − | == Schematic ==
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| − | The schematic is available in two formats - PDF and schematic images. Click the images for full resolution.
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| − | * [[:File:NAE-CW506-02-SCH.pdf|Schematic PDF (NAE-CW506-02: June 1st, 2016)]]
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| − | [[File:NAE-CW506-02_page1.png|600px]]
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| − | [[File:NAE-CW506-02_page2.png|600px]]
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